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The Synthesis Technology E102 is a 4-tap delay for control voltages (a digital implementation of the Serge ASR - Analog Shift Register). There is also a digital noise generator with 8 different types of noise spectra. With no CV patched into the INPUT jack, the digital noise is sampled. Each clock pulse (internally set by RATE or patched into CLOCK IN) samples the INPUT and stores it as a 14-bit value. Successive clocks then shift the sampled voltage to the next output. The sampled voltage is shifted in the delay line as OUT1 -> OUT2 -> OUT3 -> OUT4. A quad 14-bit DAC drive outputs accurate to <1mV.

Features

• Control knobs for Rate, Delay, and Noise. Rate sets the internal sample/shift clock rate from ~0.5Hz to 925Hz. Delay sets the number of internal delay states based on the Delay switch positon. Noise selects 1 of 8 different types of noise spectra. Karplus-Strong 'pings' to pink noise!
• Quantization Switch: if OFF will sample the input to the output. If ON adds whole-step quantization each sample clock. FLOW will ignore the sample clock and not do any shifting. The INPUT is quantized and copied to all 4 OUTs. This is the "stand-alone' quantizer mode. 1 whole step = 0.083V
• The DELAY switch sets the 3 DELAY ranges between the states (not the total) as follows: Short: 1-8 (a "1" means 1 clock between stages or a "zero" delay); Medium: 1-32 clocks; Long: 1-511 clocks.
• the INPUT jack is the input for the sampled CV. If no patch cord is inserted, the digital noise is sampled. the applied CV is sampled at the rising edge of the clock and appears as OUT1.
• The WHITE OUT provides fixed spectra white noise output. Not effected by the NOISE pot or CV input.
• the DIGITAL OUT provides the digital noise output.
• the CLOCK OUT: a 0-6.5V square wave at the same rate as the internal clock.
• The 3 Cv input control jacks do not have associated attenuators. The input range is -5V to +5V, but its important to note any applied CV is added to the matching panel control. Applied control CVs should be externally attenuated before patched into the E102.
• The CLOCK IN takes any external LFO/VCO can over-ride the internal clock. For prest results, use a pulse/square wave or a sine. The external clock must be at least 3V pk-pk. The upper frequency limit is 3kHz. Exceeding 3kHz may result in erratic behavior with loss of output voltage accuracy. Yes, it is possible to sample low-frequency audio, EGs or LFOs.
• The outputs OUT1-OUT4 contain the 4 CV outputs of the sampled INPUT. Each output can be thought as a 'tap' in a delay line, that can vary from a length of 4 (1-stage delay, the minimum setting) to 1533 (3x511).